The rewritable memories described in the context of this invention are known as EEPROMs, electrically erasable programmable read-only memories, or so-called flash memories. One characteristic of an EEPROM or flash memory is that the stored data is retained even with the supply voltage turned off. Depending on the technology employed, the physical parameters of the memory elements change due to repeated writing. Depending on the number of memory accesses, a so-called threshold voltage provided by the respective memory element changes. Connected with this is change in the current yield of the respective memory cell. A very high number of write accesses can lead to a total failure of individual memory elements due to oxide breakdown.
Another characteristic of EEPROMs or flash memories is the dependence of the drain-source current of a memory cell on its supply voltage. At a low supply voltage, the drain-source current sharply decreases and, for example, hinders or slows the reading of a memory cell.
Readout circuits, known as sense-amplifiers, evaluate the logic state of a memory cell. In the design of EEPROMs or flash memory, readout circuits are a particular challenge. On the one hand, the readout circuits must be very fast and space-efficient but on the other, they should reflect the changes of the memory cells due to multiple writing and read out the correct value even at low supply voltages. In addition, the readout circuits and the structure of a rewritable memory must be adapted to the specific requirements of an application.
A known readout circuit for EEPROMs or flash memories is based on a fully differential sense-amplifier for low supply voltages. In this case the current of a bit cell is compared in a comparator to the current of a reference cell and stored in a downstream latch. The on-time of the circuit must be set in such a manner that the sense-amplifier has made its decision with respect to the value stored in the bit cell before the readout circuit is turned off again. The reserve for the on-time must be sufficiently large to account for process variations of high-voltage and low-voltage transistors. The time span from the decision of the measuring amplifier to the switching-off of the readout circuit entails an increased power consumption.
In another known readout circuit, an optimal reading reserve is realized by realizing one data bit using two memory cells. The two memory cells here are programmed oppositely to one another. This achieves a doubled reading certainty. On the other hand, the number of memory cells doubles.